1. Field of the Invention
The present invention generally relates to a method of measuring film thickness of a semiconductor device, and particularly relates to a film thickness measuring method for use in a process of forming an insulating film after a process of forming a ferroelectric capacitor, and a semiconductor device manufacturing method using the same.
2. Description of the Related Art
In film forming/polishing processes of semiconductor devices, process management and control based on real time measurement of film thickness is required in order to improve yield and ensure device reliability. Especially, controlling the thickness of films formed on elements by sputtering is important because the film thickness affects the properties of the elements.
However, there has been no appropriate method for controlling the thickness of insulating films that are formed after ferroelectric memories (FeRAMs) production processes. Some of the reasons are: that the accuracy of optical film thickness measurements is low due to the complicated structure of films formed on silicon substrates; and that measurements utilizing reflection from metal surfaces are not applicable to materials having low reflectance. Therefore, no guarantee based on standards has been provided.
FIGS. 1 and 2 are cross-sectional views showing an example of a semiconductor device for illustrating problems with a related art film thickness measuring method in a FeRAM production process. Referring to FIG. 1, a first interlayer insulating film 110 is formed on a transistor (not shown) on a silicon substrate. A ferroelectric capacitor 125 is formed on the first interlayer insulating film 110, with a SiON cap film 111, a TEOS cap film 112, and an Al2O3 cap film 113 interposed therebetween. The ferroelectric capacitor 125 includes a lower electrode 121, a ferroelectric film 122, and an upper electrode 123. The lower electrode 121 is an extraction electrode extending horizontally to be connected to an upper interconnect (see, for example, Patent Document 1). The ferroelectric capacitor 125 is entirely covered with an Al2O3 capacitor protecting film (hydrogen diffusion preventing film) 126. It is to be noted that the Al2O3 capacitor protecting film 126 on the upper electrode 123 is denoted by the reference number 126a and the rest of the part of the Al2O3 capacitor protecting film 126 is denoted by the reference number 126b. 
In the example shown in FIG. 1, the ferroelectric film 122 is made of PZT, and the lower electrode 121 is made of platinum (Pt). The upper electrode 123 is made of iridium oxide (IrO2). The reason why the upper electrode 123 made of iridium oxide (IrO2) is used herein is to prevent hydrogen-induced degradation of the ferroelectric (PLZT) film 122 (see, for example, Patent Documents 1 and 2).
A second interlayer insulating film 128 is formed to cover the ferroelectric capacitor 125. The second interlayer insulating film 128 needs to be polished to a dashed line shown in FIG. 1 to have a predetermined design thickness so as to be flattened as shown in FIG. 2. In the example shown in FIGS. 1 and 2, the design thickness of the second interlayer insulating film 128 is 300 nm from the surface of the Al2O3 capacitor protecting film 126a on the upper electrode 123. That is, a polishing process such as CMP needs to be controlled to make the second interlayer insulating film 128 eventually have this design thickness.
For obtaining the second interlayer insulating film 128 having the design thickness after polishing, the thickness of the second interlayer insulating film 128 before polishing needs to be accurately measured so as to determine the polishing amount. In this example, although the design initial thickness (i.e. design thickness before polishing) of the second interlayer insulating film 128 from the Al2O3 capacitor protecting film 126 is 1400 nm, the actual initial thickness of the second interlayer insulating film 128 does not always agree with the design initial thickness due to variation of film forming conditions. Therefore, the actual thickness of the second interlayer insulating film 128 needs to be measured so as to determine the polishing amount. However, the thickness of the second interlayer insulating film 128 cannot be optically measured directly on the upper electrode 123 because iridium oxide (IrO2) used as the material of the upper electrode 123 has low reflectance.
One solution for this problem would be to measure the total thickness at a part where the ferroelectric capacitor 125 is not located and calculate the thickness of the second interlayer insulating film 128 based on the thickness from the silicon substrate. However, if the total thickness is measured at a part where the ferroelectric capacitor 125 is not located, since the first interlayer insulating film 110, the SiON cap film 111, the TEOS cap film 112, etc., are stacked on the silicon substrate (not shown), information from the reflection light is complicated. Therefore, the thickness from the substrate surface (indicated by the arrows with x mark of FIG. 1) cannot be accurately calculated.
That is, it is impossible to control the final thickness (i.e. thickness after polishing) of the second interlayer insulating film 128 to match the design thickness of 300 nm from the Al2O3 capacitor protecting film 126a on the upper electrode 123. This might cause a problem of overetching into the Al2O3 capacitor protecting film 126a and the upper electrode 123.
In the actual process, a pilot wafer is vertically cut so as to measure the thickness of the second interlayer insulating film 128 on the ferroelectric capacitor 125 real time by cross-sectional SEM observation. This method not only wastes the wafer but also makes the manufacturing process complicated because additional processes such as a cutting process are required for film thickness observation.
<Patent Document 1> Japanese Patent Laid-Open Publication No. 2005-217044
<Patent Document 2> Japanese Patent Laid-Open Publication No. 2003-347512